HOW TO EXPAND THE APPLE SYSTEM
|The Apple systern can be
expanded to inctude niore memory and IC devices, via a 44-pin edge
connector. The system is fully expandable to 65K, with the entire data and
address busses, clocks, control signals ( i. e. IRQ, NMI, DMA, RDY, etc.),
and power sources available at the connector. All address lines are TTL
buffered, and data lines can drive ten equivalent capacitive loads (one
TTL load and l3Opf) without external buffers. All clock signals are TTL.
The Apple system runs at approximately 1 MHz (SCC spec sheet) and is rully
coinpatible with 6800/6500 style timing.
Three pcwer sources are available at the edge connector: +5 volts regulated, and raw DC (approximately +1- 14V) for the +l2V, -12V, and -5V snpplies. If +1 2v, -12v, or -5V supplies are required, EXTERNAL REGULATORS MUST BE USED. An excess of 1.5 amps from the "onboard" regulated +5V supply is available for expansion (assuming suitable transforme r ratings are employed). Exercise great care in the handling of the raw DC, as no short-circuit protection is provided.
The Apple system has full DMA capability. For DMA, the DMA control line tri-states the address buss, thus allowing external devices to control the buss. Consult MOS TECHNOLOGY 6502 Hardware Manual for details. (For DMA use, the solder jumper on the board, marked "DMA", must be broken.)
For the 6502 microprocessor, the RDY line is used to halt the processor for single stepping, or slow ROM applications. Refer to Apple "Tech Notes" for examples.
Read Key from KBD:
High order bit equals 1.
RED Control Reg. D011
High orderbit indicates "key ready". Reading key clears flag. Rising edge of KBD sets flag.
DSP DATA DO12
Lower seven bits are data output, high order bit is "display ready" input (1 equals ready, 0 equals busy)
DSP Control Reg. D013
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