Newsgroups: comp.sys.apple2.programmer Subject: Re: 6502 assembler From: dempson@actrix.gen.nz (David Empson) Date: Fri, 1 Oct 1999 01:35:19 +1200 Message-ID: <1dyz220.ybj8f2hya3jsN@dempson.actrix.gen.nz> References: <4iVF3.2276$QJ.87287@typ11.nn.bcandid.com> <7sc1ps$c8l$1@news.rt66.com> <37ED98A4.8E434651@plano.net> <7sot34$2db$1@nnrp1.deja.com> <1dyvc4q.1hrmrbg68993gN@dempson.actrix.gen.nz> <7su1mj$os3$1@nnrp1.deja.com> Organization: Empsoft User-Agent: MacSOUP/2.4 NNTP-Posting-Host: 202.49.157.176 X-Original-NNTP-Posting-Host: 202.49.157.176 X-Trace: 1 Oct 1999 01:33:40 NZST, 202.49.157.176 Lines: 56 Path: news1.icaen!news.uiowa.edu!news.physics.uiowa.edu!hammer.uoregon.edu!newsfeed.direct.ca!usenet.net.nz!news.iprolink.co.nz!news.actrix.gen.nz!dempson Xref: news1.icaen comp.sys.apple2.programmer:10912 Date Doctor - the best y2k fix wrote: > I was starting to wonder about all the opcodes and addressing modes I > was describing. There are only 256 machine opcodes, and each addressing > mode is represented by a different opcode pair, so I was sure I was > running out of room with the size of NUM_INSTRUCTIONS * > NUM_ADDRESSING_MODES.... The 65816 almost manages to use all 256 opcodes. There is only one unused one: $42. This is nominally "WDM" (the initials of William D Mensch, the creator of the 65816). It was reserved for use as an opcode prebyte for future processors. The key point you are probably missing is that no instruction implements every addressing mode, and most of them have only a small selection. As I mentioned previously, the "big eight" accumulator instructions have the most addressing modes: LDA, STA, ORA, AND, EOR, ADC, SBC, CMP In total, on the 65816, each of the instructions has 15 addressing modes (except for the omission of "STA immediate", which is meaningless). That accounts for 119 out of the 255 used opcodes. [136 left] The next largest group looks like the read/modify/write operations: ASL, LSR, ROL, ROR, INC, DEC Each of these has five opcodes, for a total of 30. [106 left] Some closely related instructions are STZ (4 opcodes), BIT (5 opcodes), TSB and TRB (2 opcodes each). [93 left] Now the index register group: LDX, LDY (5 opcodes each); STX, STY, CPX, CPY (3 each). [71 left] Now the jump group: JMP (4 opcodes), JSR (2 opcodes). [65 left] Everything else is a single opcode: BCC, BCS, BEQ, BMI, BNE, BPL, BRA, BRK, BRL, BVC, BVS, CLC, CLD, CLI, CLV, COP, DEX, DEY, INX, INY, JML, JSL, MVN, MVP, NOP, PEA, PEI, PER, PHA, PHB, PHD, PHK, PHP, PHX, PHY, PLA, PLB, PLD, PLP, PLX, PLY, REP, RTI, RTL, RTS, SEC, SED, SEI, SEP, STP, TAX, TAY, TCD, TCS, TDC, TSC, TSX, TXA, TXS, TXY, TYA, TYX, WAI, XBA, XCE. -- David Empson dempson@actrix.gen.nz Snail mail: P O Box 27-103, Wellington, New Zealand