Hi All, At the strong urging of Michael Mahon, I have started revising the CFFA firmware to use only 6502 instuctions. The basic changes only took about an hour. (and that is what michael convinced me of) After making all of the changes, on the first attempt to test my new code in my //e platinum, it worked great! Hooray! But, when testing began on my ][+ things didn't go so well. So at some point here, I am going to make a beta version available to those who don't mind wasting some of their time with a setup that might fail. Of course getting the code onto the CFFA will require an eprom programmer (because my board has no FLASH). This brings me to another question.... It would really be helpful to have a 6502 In-Circuit Emulator or ICE. Does anybody have one they want to sell or borrow for a period of time. (or is there a way to get NoICE to run on the Apple ][?) I am currently in contact with Dave Lyons, in an attempt to get a hold of Apple's 65816 Dissembler software for the HP1630D logic analyzer which I have. Although I need to find a floppy drive the analyzer. I think it is a HP-IB (or GP-IB) based floppy drive. Anyway, if you are interested in helping do some testing and has have EPROM programmer, please drop me an email. Or if you have an 6502 ICE unit you are will to sell, let me know. Thanks, Rich > (or is there a way to get NoICE to run on the Apple ][?) Rich, I just started working on NoICE support a few days ago ... I have the Mon6502 assembling with ca65 and I am able to connect and dump/list areas of memory remotely over the SSC... It does not single step properly yet ... but I am working on that.... Send me an email if you want to see what I have so far... Personal Website: http://members.rogers.com/rg.jones/ Apple Specific Website http://members.rogers.com/apple2stuff/apple.htm Email: Reply to apple2stuff at rogers dot com Hi All, As I said before, I have started working on a new firmware. The changes all worked great in my //e platinum, but crashed in my ][+. Remembering I had problems with my ][+ during the original development, I decided to take another looks at the bus timing. I see a major problem! Their seems to be a difference between the //e platinum and ][+ when it comes to the relationship of /DEVSEL and the 7M clk signal. Basically, the /DEVSEL is shifted in relation to the 7M, and this is screwing up the timing when plugged into my apple ][+. I use the 7M clock to create a delay, so the /IORD and other signals have the correct timing. If my ][+ can be assumed to represent a typical ][+, then there is little change others will get it working either. Or, if others do work, it is very marginal at best. My free Altera dev system license ran out, so I am now downloading the lastest version, and a new license. I will let you all know I come up with a new version. I don't think it is something that will effect //e or later users. In fact I fear, I may have to have one CPLD for the ][+ and one for the //e enhanced or greater. I will update this thread and my website when I know more. Thanks, Rich http://dreher.net/CFforAppleII/ In article <20040521032055.08010.00000946@mb-m04.aol.com>, mjmahon@aol.com says... > The timing differences between the //e and the older ]['s are > pretty well-known. As you might expect, if a card was designed > to work with the older machines, it will (usually) work in the //e, > but the reverse is not the case. The //e designers knew that > the machine had to support almost all the ][/][+ cards. (One > card that was notorious because of its syncopated timing and > DMA access was the Microsoft Softcard--it worked in some //e's > and not in others, resulting in a redesign for the //e.) > > I'm sure that you will find a timing that will provide ample setup > and hold times for both classes of machine. > > Ironically, the new timing may also correct some current cases > of marginal operation (such as with fully-loaded, accelerated > systems). > > -michael Michael, Indeed, it would have been cool to pour over a set of design notes of some old peripherial designer before I began this project. But, I think I have finally fixed the timing, in such a way that both ][+ and //e and //e enhanced machines should all work. I still have to get out a GS and try it. The timing *may* also help some brands of CF cards that didn't work perviously now work. But don't get too excited, because I tried my Lexar card and it still did NOT work :( Anyway, since I really only have less than 25 cards left, that is, most are already in customers hands. I will come up with some very reasonable (low cost) plan to get new CPLD's into the people's hand who want them. I will figure out the details later... Thanks, Michael, for getting me to work on the 6502 based firmware, and as a result find these timing issues. Rich