Rubywand <rubywand@swbell.net> wrote:

> David Empson writes ...
> > 
> > Rubywand <rubywand@swbell.net> wrote:
> > 
> > >     As to why the original CDA might want to write to $00/C05D, I don't
> > > know.
> > 
> > The Zip Chip (and Zip GS) use the annunciator locations ($C058 to $C05F)
> > to access the on-chip registers.  There is a special sequence to enable
> > and disable access to the Zip registers, so that normal use of the
> > annunciators still works.
> > 
> > For the Zip GS, writing to $C05D sets the CPU speed (a 4 bit field, with
> > sixteen settings ranging from 6.25% to 100%).
>  ....
> 
>      So, I guess, since the speed setting works, the only down side of not
> doing the final Store A Long to 00/C05D as intended is that Annunciator2 ends
> up with its state changed?

The CDA should be disabling access to the registers as a final step.

At least one of the annunciators is always affected by a Zip mode
change, since the enable sequence requires writing to $C05A.

I don't know whether the annunicators are affected by subsequent
accesses - it depends on whether the Zip ASIC passes the addresses on to
the motherboard.

There is no way to read the state of annunciators 0-2.  The IIgs can
read annunciator 3, but I don't recall offhand whether this is possible
on the IIc or IIe (it isn't possible on the ][ or ][+).

There is no way the Zip CDA could restore the previous state of the
annunciators.  The best it could do would be to restore the default
states used by the monitor after reset (two on and two off, but I forget
which way around).

>      Thanks for the info! (Where did you find it?)

Zip Technology sent me five pages of documentation, which explains all
the registers of the Zip GS in detail.  The document was dated September
1990, but I don't remember when I got it (probably late 1990 or some
time in 1991).

I think I remember posting a clarified version of it many years ago.

-- 
David Empson
dempson@actrix.gen.nz
Snail mail: P O Box 27-103, Wellington, New Zealand