Bryan Parkoff wrote: > I understand that Stack Pointer can only be restricted at Page One in > both 6502 and 65C02. It still can restrict maximum of 256 byte space. You > mentioned that 65816 can handle maximum of 65536 byte space for Stack > Pointer. I don't think that it is true because it still restricts the 256 > byte space. No it doesn't. If you are in native mode, the stack pointer register is 16 bits wide, and can be set to any value ranging from $0000 to $FFFF. For example, if you are running in ProDOS-8 under BASIC.SYSTEM and set the stack pointer to $1FFF, you can continue to push data onto the stack and the stack pointer will decrease down as far as $0800 before you start to run into anything important, assuming no BASIC program was present. In this example, you have 6 KB of stack space. If you really needed a lot of stack space, you could set it to something like $8FFF, and potentially have 32 KB of stack space. (If you wanted to call any operating system or firmware code, you would have to switch back to emulation mode, which forces the stack back into page 1.) > If you want to use 512 byte space or 1024 byte space, you will have to > use PCS (Push Accumulator Stack Pointer) PCS and PSC allow me to switch one > Stack Pointer between Page to Page. There is no such instruction. Do you mean TCS and TSC (transfer 16-bit accumulator to/from stack pointer)? The other way of accessing the stack pointer is TSX and TXS (also supported on the 6502 and 65C02, but limited to 8 bits on these CPUs, of course). On the 65816 in native mode, TCS and TSC will always transfer a 16-bit value between the accumulator and stack pointer (or vice versa). If the CPU is currently set to use an 8-bit accumulator (M=1) then the hidden 'B' register (top half of the 16-bit accumulator) is still involved in the transfer. On the 65816 in native mode, the data transfer size for TXS and TSX depends on the current size of the index registers. If the index registers are set to 8-bit mode (X=1) then TXS will result in the high order byte of S being cleared, putting stack on zero page, and TSX will only transfer the lower order 8 bits of the stack pointer into the index register. > For example, I set $4000 for Stack Page 1, $4100 for Stack Page 2, $4200 > for Stack Page 3, and $4300 for Stack Page 4. Only one problem is that we > can't be certain if Stack Page 1 will be full before we tell Stack Pointer > to redirect to Stack Page 2. You don't need to deal with pages - just set the stack pointer to $43FF in this case, and you can push up to $0400 bytes on the stack before you will cross below $4000. > I use PHP instruction that will return one byte. If it tells: $FF, it > means to be available for 256 bytes. If it tells: $7F, it appears to be > half full. If it tells $00, it appears to be complete FULL. Eh? PHP pushes the processor flags register onto the stack. It doesn't return any data to the CPU, and has nothing to do with the amount of space on the stack. The value pushed in 65816 native mode consists of the following flags: NVMXDIZC. (How on earth did I remember that?) I don't think it is very likely that you would see values of $FF or $7F for the value pushed by PHP (decimal mode is active) > It is the same example for Direct Page Pointer that it can move between > $0000-$FFFF. If Direct Page One is full, it will have to create Direct Page > Two before it can switch back and forth. The direct page is a different situation. If you use direct addressing mode in native mode, you can only access 256 bytes (257 if you do a 16-bit access at direct page location $FF) starting at the location pointed to by the D register. Indexing with Direct,X or Direct,Y modes potentially allows access to all of bank zero starting at the address pointed to by the D register (wrapping around from $00/FFFF to $00/0000 if necessary). IIgs applications typically use either of two models for dealing with the direct page: (a) Fixed direct page register, which points to frequently used variables, allowing shorter and faster instructions to access them. The direct page should be page-aligned for maximum speed. (b) Direct page register is used as a stack frame pointer, to reference local variables and parameters passed into functions. This is commonly used in applications written in high level languages (e.g. C or Pascal). Each function will typically save the old value of D and set up a new value to access its own local variables. It is rare for the D register to be page aligned in this case. -- David Empson dempson@actrix.gen.nz