Holger Picker wrote: > What exact values are given if you read a softswitch? I know that some > mirror the "video-byte" and some only have the highbit (bit 7) defined. In > that case what do the other lower bits look like? The end result varies, depending on the softswitch. What actually happens in the hardware is that only some of the data bus bits are driven by the I/O hardware during the CPU read cycle. These bits will assume the appropriate value. The remaining bits will read what is effectively random data, based on the floating state of the data bus. Due to the split video/CPU cycle arrangement in the Apple II, if the CPU executes a read cycle in which some of the data bus bits are not driven, they will usually return the corresponding bits of the last byte read by the video hardware. I don't know how reliable this is - there may be some machines in which the data bus tends to float to a fixed state faster than in others, which will result in the undefined bits producing a fixed pattern. Assuming the video byte is returned reliably, then if you read an I/O location which defines no bits, you will get the entire video byte (e.g. reading one of the video mode setting switches in $C050-$C057). If you read a single-bit flag location, you get the flag in bit 7 and the lower 7 bits are the lower order 7 bits of the last video read. If you read a location which is fully defined, such as the keyboard buffer, you get all eight bits of the I/O data and none of the video data. This is complicated further by the somewhat arbitrary way in which the I/O addressing is implemented. In particular, the lower order 7 bits of memory locations $C000-$C01F actually read the keyboard buffer register. Bit 7 is the "key latched" flag for $C000-$C00F, or a specific flag bit for $C010-$C01F ("any key down" in $C010, various IIe/IIc mode flags in the remaining locations). > I've heard that some softswitches read either $8d or $0d. Is that > true? (Sorry, I can't check that as I haven't got a working AppleII.) If you tried to read a location in $C010-$C01F from the monitor, I'd expect $0D or $8D, because you've just pressed the RETURN key ($0D). The same doesn't apply for $C020-$CFFF. > $c001: > ====== > > C001 49153 80STOREON ECG W Use PAGE2 for Aux Memory > Okay, 80STORE lets you write to $400-$7ff aux memory. But how about > $2000-$3fff? I've heard you can only write to $2000-$3fff aux mem if you > first select $c057 "HIRES" (and also $c050 TXTCLR?). Hi-res page 1 ($2000-$3FFF) switching is enabled if 80STORE is on and HIRES is on. It doesn't matter what state the GR/TEXT and MIXED/FULL switches are in. e.g. it is possible to be displaying text page 1 while accessing $2000-$3FFF in auxiliary memory via 80STORE, HIRES and PAGE2. Note that AN3 (annunciator 3) is also involved with double resolution lo-res and hi-res graphics mode. To display double resolution modes, it is necessary to enable 80COL, GR, set AN3 off ($C05E), and select HIRES or LORES as appropriate. If 80STORE is on, then page 1 is displayed. If 80STORE is off, then PAGE1/PAGE2 selects the displayed page. If you set AN3 on ($C05F) or turn off 80COL then the double resolution mode is disabled, returning to the standard resolution mode. [I'm going from a book description for the ordering of $C05E/$C05F. I haven't memorised this one, so it would be useful if someone else can confirm that I have these around the right way.] > $c002-$c005: > ============ > > C002 49154 RDMAINRAM ECG W If 80STORE Off: Read Main Mem $0200-$BFFF > > C003 49155 RDCARDRAM ECG W If 80STORE Off: Read Aux Mem $0200-$BFFF > > C004 49156 WRMAINRAM ECG W If 80STORE Off: Write Main Mem $0200-$BFFF > > C005 49157 WRCARDRAM ECG W If 80STORE Off: Write Aux Mem $0200-$BFFF > > As far as I've heard these softswitches also work with 80STORE on with the > difference that the memory between $0400-$07ff and $2000-$3fff is accessed > seperately via the PAGE2 selector, but the rest just works as normal. Correct. 80STORE overrides the main/aux selection via these switches. > $c010: > ====== > > C010 49168 KBDSTRB OECG WR Keyboard Strobe > I've also found that $c010 on an AppleIIe and Apple//c contains an "any > key down" flag in bit 7, with the keycode in the remaining bits. Does the > "any key down" apply to SHIFT and CTRL, too? No. It only applies to key combinations that generate a character code (CTRL, SHIFT, CAPSLOCK by themselves do nothing, but will modify the value returned by most normal keys). (Of course the OpenApple and ClosedApple keys are completely independent of the normal keyboard handling and are read via the game port button inputs.) > If not, it sounds to me like a simple mirror of $c000. Nope. Bit 7 of $C000 is the keyboard latch flag. It is set when a key is pressed, and cleared when any location in $C010-$C01F is read. You can repeatedly read $C000 and will continue to see bit 7 set. Bit 7 of $C010 is only set while the key is actually held down. If you press and release a key before the software reads location $C010, it will see bit 7 clear. Auto repeat is handled in hardware: it will cause bit 7 of $C000 to be set again every repeat period. $C010 will not behave any differently - bit 7 is set the entire time the key is held down. Software will typically poll $C000 to see whether a key has been pressed, then read or write $C010 to clear the latch flag. If the program wants to watch the current state (e.g. do it own auto repeat logic) then it can poll $C010 instead. The other factor to consider is that the IIe and IIc keyboards implement N-key rollover. If you are holding down a normal key and press another one, the second one will replace the first one. Here is a hypothetical example, assuming RETURN was the last key pressed. 1. Write $C010 to clear the latch. 2. Press and hold the CONTROL key. $C000 = $0D, $C010 = $0D. 3. Press and hold the X key. $C000 = $98, and will hold this value if read repeatedly. $C010 = $98 (any key down). If you read $C000 again after reading $C010, it will return $18 until auto-repeat kicks in, at which point it will again return $98. 4. Let go of CONTROL No change - the fact that you are holding down a key will continue auto repeat of the last character. 5. Let go of X. $C000 = $98 (assuming you haven't recently accessed $C010) $C010 = $18 (no key is down) If you read $C000 again after reading $C010, it will return $18, and will remain stable. > $c015: > ====== > > C015 49173 RSTXINT C R Reset Mouse X0 Interrupt > How does RSTXINT work? > > $c017: > ====== > > C017 49175 RSTYINT C R Reset Mouse Y0 Interrupt > How does RSTYINT work? These are specific to the IIc. In the IIe, these locations are RDCXROM adn RDC3ROM. According to the IIc Technical Reference, these locations reset hte X and Y mouse movement interrupts. The read value is not specified, but I expect they behave like RSTVBL below. I've never dealt with these, so I can only go by the reference manual. This is rather vague. > $c019: > ====== > > C019 49177 RSTVBL C R Reset Vertical Blanking Interrupt > How does RSTVBL work? Again this is IIc only. When a the vertical blank period begins, bit 7 of this location is set. It will remain set until software reads this location. It will then be clear until the next VBL. (VBL can also be reset by accessing location $C070, which also triggers the paddle timer.) In the IIe, the same location reads the current state of VBL: bit 7 is set during the normal scan and reset during the vertical retrace. In effect, this switch has opposite polarity in the IIe and IIc, but they work on a completely different basis - latched flag in the IIc, current state in the IIe. > $c006/c007/c00a/c00b: > ===================== > > C006 49158 SETSLOTCXROM E G W Peripheral ROM ($C100-$CFFF) > > C007 49159 SETINTCXROM E G W Internal ROM ($C100-$CFFF) > > C00A 49162 SETINTC3ROM E G W ROM in Slot 3 > > C00B 49163 SETSLOTC3ROM E G W ROM in Aux Slot > These softswitches select either the internal rom or the slot rom on an > AppleIIe. How about the Apple//c? Not implemented. The IIc has a monolithic ROM which is always enabled from $C100-$CFFF (and $D000-$FFFF if the language card is not active). The IIc also has a ROM bank switch, which toggles the entire $C100-$FFFF area between two banks whenever $C028 is read. Hardware reset always selects the main bank (I'm not sure whether this is the first or second half of the 32K ROM). The firwmare handles bank switches by going through one of several bank toggle hook entry points in the $C780 to $C7FF area. These are duplicated in both banks. The original IIc firmware only used one bank (16KB). The first revision ("UniDisk 3.5") and later use both banks. In the UniDisk 3.5 revision, the alternate bank contains SmartPort, AppleTalk and self-test code. I imagine they put the memory expansion support code in this bank for later revisions (the AppleTalk code was removed). > I wonder because ApplePC uses a file called APPLEIIC.ROM that is 32 KB > long instead of 16 KB. I've taken a look at it, but I can't make head or > tail out of it. It seems that the file looks like > offset apple mem > $0000 ==> $c000 firmware rom > $1000 ==> $d000 applesoft > $2000 ==> $e000 " " > $3000 ==> $f000 monitor etc > $4000 ==> ???? additional slot rom? > $5000 ==> ???? a bit of rom (slots?) > $6000 ==> ---- only contains 0 > $7000 ==> ---- only contains 0 apart from interrupt(?) vectors at $7ffa In that case the main ROM is the first half, and the "alternate" ROM is the second half. > What on earth does this mean? > > $c040: > ====== > > C040 49216 RDXYMSK C R7 Read X0/Y0 Interrupt > How do you "read" the interrupt? > > $c041: > ====== > > C041 49217 RDVBLMSK C R7 Read VBL Interrupt > How do you "read" a VBL interrupt? These read the interrupt enable mask for X and Y movement. > $c042 - $c043: > ============== > > C042 49218 RDX0EDGE C R7 Read X0 Edge Selector > > C043 49219 RDY0EDGE C R7 Read Y0 Edge Selector > > What is an "edge selector"? The X and Y movement interrupts can be set to interrupt on either the rising or falling edge of the pulse train from the mouse. > $c048: > ====== > > C048 49224 RSTXY C WR Reset X and Y Interrupts > If $c015 and $c017 reset X0 and Y0 what does this do? Resets both of them at once, as far as I can tell. > And what is the difference between X0 and simple X anyway? Probably someone has misquoted something. The reference manual always refers to them as X0 and Y0. These refer to the primary movement input from the mouse (XMOVE and YMOVE). X1 and Y1 are the secondary input (XDIR and YDIR), which is out of phase. The state of the direction input at the rising or falling edge of the movement input identifies which direction the mouse is moving. Both the MOVE and DIR inputs generate a pulse train, the frequency of which indicates the speed at which the mouse is moving. This can generate a lot of interrupts if the mouse interrupt is enabled. > $c055: > ====== > > C055 49237 TXTPAGE2 OECG WR If 80STORE Off: Display Page 2 > > ECG WR If 80STORE On: Read/Write Aux Display Mem > I've heard that as soon as you switch to 80STORE the videopage switches to > page 1, IOW it is not possible to show textpage 2 on screen and use > 80STORE at the same time. Correct? Yes. > > $c058 - $c05f: > ============== > > C058 49240 DISXY C WR If IOUDIS on: Mask X0/Y0 Move Interrupts > Well, what does this mask look like? "Mask" as in "Disable". A read or write to this location will disable the mouse movement interrupts. > > C059 49241 ENBXY C WR If IOUDIS on: Allow X0/Y0 Move Interrupts > And what is the difference between $c058 and $c059? This one enables the selected mouse interrupt. The interrupt source is selected by $C05C > > C05A 49242 DISVBL C WR If IOUDIS on: Disable VBL Interrupts > > C05B 49243 ENVBL C WR If IOUDIS on: Enable VBL Interrupts > I think I know what these mean, > > C05C 49244 X0EDGE C WR If IOUDIS on: Interrupt on X0 Rising > > C05D 49245 X0EDGE C WR If IOUDIS on: Interrupt on X0 Falling > > C05E 49246 Y0EDGE C WR If IOUDIS on: Interrupt on Y0 Rising > > C05F 49247 Y0EDGE C WR If IOUDIS on: Interrupt on Y0 Falling > but I'm lost with these. Refer to descriptions of XMOVE/YMOVE above. These select whether the rising or falling edge of the input causes the interrupt. IOUDis is controlled by $C07E and $C07F, in case you missed that one. > $c060: > ====== > > C060 49248 C R7 Status of 80/40 Column Switch > Strange. Does it mean that it mirrors $c01f "RD80VID: R7 Status of 40/80 > Columns", or is there a difference? No - it refers to the physical switch on the case, which is labelled "80/40". > $c063: > ====== > > C063 49251 RD63 C R7 Bit 7 = Mouse Button Not Pressed > I guess: 1 for not pressed, 0 for pressed? Correct. > $c066/$c067: > ============ > > C066 49254 RDMOUX1 C R7 Mouse Horiz Position > > C067 49255 RDMOUY1 C R7 Mouse Vert Position These read the current state of the X1 (XDIR) and Y1 (YDIR) inputs. They must be sampled within 40 microseconds of the X0/Y0 interrupt to ensure a reliable reading, though 200 microseconds may be OK most of the time. The mouse on the IIc is really horrible. Consider rapid uniform movement to the right (no vertical movement) with interrupts enabled. You get a square wave on X0 (XMOVE), each rising or falling edge of which causes an interrupt. The X1 (XDIR) signal is delayed, and the interrupt handler must sample XDIR quickly to ensure it gets the correct direction. This is done every time an interrupt occurs. If the mouse is moved fast enough, there might be dozens or potentially hundreds of interrupts per second. > $c070: > ====== > > C070 49364 PTRIG C WR Analog Input Reset + Reset VBLINT Flag > I thought $c019 would do the job of clearing VBL. What is the use of this? > And why is it bundled? (Shrug) All locations in $C07x have these side effects. $C07E and $C07F also control the IOUDis soft switch. > $c073: > ====== > > C073 49367 BANKSEL ECG W Memory Bank Select for > 128K > Oh dear, that is a big one. How does it work? This is not a standard part of the IIc. It is the bank select register for the Applied Engineering Z-Ram, which operates like their RamWorks card. It is a write only 8-bit register which sets the active bank, with 0 selecting the normal "auxiliary" bank. > Another wild guess: One bank means 64KB aux memory. You always access the > motherboard with the usual softswitches, all aux softswitches point to > this ram. True? But what about 80STORE? Will it also write to the selected > bank or always to the text and graphic page on the first aux bank? As I understand it, 80STORE and 80COL (and the memory accesses by the video hardware) always refer to bank 0 of a multi-bank auxiliary memory card, but I haven't seen any technical documentation so I can't be certain. > And what happens if you write e.g. 4 but don't have so much additional > ram? Will there be a wrap around (e.g. 4 ==> 0) or will the databus read > some undefined values? It probably depends on the card design. I'd expect software to do a reasonably extensive multi-bank RAM test, using ascending bank numbers starting with 0, until it finds an echo with a previous bank. > And could you really have 256 * 64 KB memory? In theory, yes. The IIc memory expansion cards never got over 1 MB, as far as I know. The IIe ones got as far as 1 MB plus a 2 MB piggyback card. > $c078/c079/c07e/c07f: > ===================== > > C078 49372 C W Disable IOU Access > > C079 49373 C W Enable IOU Access > Fine. Think I've understood that, These are unofficial locations. Software should use $C07E and $C07F, but the $C078 and $C079 locations are mentioned in at least one place in the technical reference manual, so I guess they are acutally implemented for every pair of locations in $C078 to $C07F. > > C07E 49278 IOUDISON EC W Disable IOU > > RDIOUDIS EC R7 Status of IOU Disabling > > C07F 49279 IOUDISOFF EC W Enable IOU > > RDDHIRES EC R7 Status of Double HiRes > but why do you have to enable IOU? What is the difference? And BTW: What > does IOU mean? "Input/Output-Unit?", "I owe you?" ... Input/Output Unit. If IOUDIS is on then access to the mouse hardware is enabled and the IOU soft switches in the corresponding locations are disabled. > Additional question: > ==================== > > There are a lot of softswitches on the Apple//c for the mouse. Apple Oasis > emulates an AppleIIe also with a mouse. How can you have a mouse on the > AppleIIe if the softswitches work only on an Apple//c? Or is there a > completely different way to handle the mouse? (If so, how?) The IIe doesn't have any hardware support for a mouse. You have to use an I/O card in a standard slot. The IIe mouse card has its own microprocessor (a 6805) which handles the same mouse movement and direction signals that the IIc has to read directly. The mouse card and the IIc (and the IIgs) present the same firmware interface to the application, so an application which uses the firwmare doesn't need to do anything special to identify the host machine - it just needs to search the slots to find the mouse firwmare. I imagine Apple Oasis is simulating the firmware interface. I don't think the mouse card provides hardware access to the mouse signals. I'd suggest doing the same for a IIc, unless you want full compatibility with obscure applications that use the IIc mouse hardware directly. The IIgs uses an Apple Desktop Bus mouse (same as 1987 to 1998 Mac models), which has yet another hardware interface and softswitch arrangement. Just to confuse things, it also contains a Mega II chip, which supports a direct hardware interface to a mouse, which is similar to the IIc implementation, but this hardware is not connected. (I don't think Apple ever used the Mega II mouse support.) -- David Empson dempson@actrix.gen.nz Snail mail: P O Box 27-103, Wellington, New Zealand