Hellfire wrote: > Does anyone know if all 16 address lines can be used on the memory slot? The memory expansion slot effectively has 22 address lines for use by RAM (10 bit multiplexed row/column address, plus 2 bit row select), for a total address space of 4 MB. The bank address from the CPU (high order 8 bits of the 24-bit address) is also multiplexed onto the data bus, but it is only valid for CPU-initiated memory cycles, not DMA cycles. This allows a memory expansion card to provide nearly 8 MB of RAM, at the expense of DMA compatibility. It isn't possible to exceed 8 MB due to a design limitation on the motherboard: the FPI/CYA ASIC only supplies the dynamic RAM control signals to the memory expansion slot for addresses in banks $02 to $7F (ROM 00/01) or $10 to $7F (ROM 3). Memory below this range is on the motherboard. Banks $80 through $DF and $E2 through $EF are not usable in any manner. (The TransWarp GS is a special case - some of its own firmware is mapped into the $Dx area, but this is implemented on the accelerator card without interaction with the motherboard.) Banks $E0 and $E1 are "slow" RAM on the motherboard, accessed via the Mega II. Banks $F0 through $FF are ROM. The memory expansion card can provide all banks which are not implemented on the motherboard, i.e. $F0 through $FD for ROM 00/01, or $F0 through $FB for ROM 3. The convention is that banks $F0 through $F7 are available for a ROM disk (accessed through the slot 5 SmartPort firmware, with supporting driver code at the start of bank $F0) and banks $F8 and higher are reserved for future firmware expansion. > A IIGS with 64MB would be nice Not feasible without bank switching no matter what the motherboard does - the 65816 processor only has a 24-bit address bus, which gives a maximum address space of 16 MB. -- David Empson dempson@actrix.gen.nz