David Empson wrote: > Bryan Parkoff wrote: > > > 65832 Manual Is Found! > > > > Go to http://www.apple2.org.za/gswv/A2.LOST.N.FOUND.CLASSICS/CPU.65832/ > > Thanks for the pointer. > > It is in a rather awful format (separate GIF document for each page, > with no HTML index), so it will take me a little while to absorb its > contents. Well that was a non-event. If this document is accurate, then the only differences between the 65832 and 65816 would have been: - Three layers of emulation mode (65832 native, 65816 emulation and 65C02 emulation). The existing 'E' flag bit is renamed 'E8' and a second 'E16' flag is added. The new XFE instruction toggles the E16 and E8 flags with the V and C flags respectively. - 32-bit A, X and Y registers available in 65832 native mode. X and Y can be either 32-bit or 8-bit (controlled by 'X' flag). A can be 32-bit, 16-bit or 8-bit (controlled by 'M' and 'E8' flags). - Yet another set of interrupt vectors in 00FFD0-00FFDF for use in 32-bit native mode. That's it. No new instructions (apart from XFE) or addressing modes. No improvements to the placement of the stack or direct page. It theoretically supports a 32-bit address space, but there is no way to access more than 16 MB outside of the chip. The rest of the 4 GB address space would only be available in an ASIC which incorporated the 65832 as a CPU module, and appears to have very limited addressing options. The second half of the document is basically identical to the 65816 data sheet. I couldn't see any evidence that an opcode had been allocated for the new XFE instruction. Since the 65816 uses all but one of the possible opcodes, and the last one was reserved as a pre-byte, the XFE would require a two byte opcode, probably WDM (0x42) followed by an unspecified second byte (with the XCE opcode being a likely candidate). -- David Empson dempson@actrix.gen.nz