Blake Patterson wrote: > Could someone post a REAL short piece of asm code that will simply put > the GS into SHR mode (320x200) which I _think_ is simply doing a TSB w/ > $80 in the accumulator to that screenmode byte. But it's not quite working. A possible issue might be shadowing. What operating environment are you running under? Is this a GS/OS application, a shell tool, or something running in 8-bit mode? If you are running under GS/OS, I'd suggest using QuickDraw to enable SHR mode correctly, including identifying which memory area you should be using (shadowed buffer in bank 1 or the real one in bank $E1). For an application, this means starting up the tool locator, memory manager, miscellaneous toolset and QuickDraw. The QuickDraw startup call tells you where the screen memory is located. You will need to allocate one page of bank zero memory to QuickDraw. You can then use the GrafOn and GrafOff calls to enable and disable SHR mode. If you aren't using QuickDraw at all, you should still consider using the memory manager to reserve the memory areas used by the SHR buffer (and the shadowed buffer, if you want to use shadowing). If you want to enable or disable shadowing of the SHR screen, you need to play with bit 3 of SHADOW ($C035): set to disable shadowing, clear to enable. Another problem you might be running into is linearization (bit 6 of NEWVIDEO, $C029). If you are trying to draw to the SHR screen while it is not enabled, this bit must be set. (It rearranges memory in the $E1/2000 to $E1/9FFF area so that it is linear for SHR mode.) This bit is ignored if SHR mode is actually enabled (bit 7 of NEWVIDEO is set) - the screen is always linearized while SHR is active. The linearization bit must be clear for using double hi-res mode. Another thought occurs to me: TSB $C029 is absolute mode. What is your data bank register set to? This instruction will only work if DBR is set to 0, 1, $E0 or $E1. (The I/O space does not exist in other banks, unless you use an esoteric bit which will cause major compatibility problems with all software, including the operating system, toolset and firmware.) -- David Empson dempson@actrix.gen.nz Snail mail: P O Box 27-103, Wellington, New Zealand Kent Dickey wrote: > In article <1e3yiub.5auco369ugu8N%dempson@actrix.gen.nz>, David Empson > wrote: > > [ Stuff talking about the "shadow in all banks" bit in the //gs shadow > > register. ] > > >That is pretty much how it works. With this bit enabled, all "fast" RAM > >banks (0 to $7F) have the same arrangement as banks 0, 1, $E0 and $E1, > >i.e. I/O space from $C000 to $CFFF, and a "language card" bank switch > >arrangement in $D000-$FFFF (with two banks at $D000-$DFFF). > > [ snip ] > > >This feature might have been intended to be used with some kind of weird > >8-bit hybrid operating system that tries to behave like a multi-bank > >Apple II, but I can't see it being particularly useful. > > It turns out the Megademo by NFC uses this mode in a clever way. > Remember, it's the "shadow" register--not only do you get the I/O > space, you also enable shadowing from other banks into $E0 or $E1. I've been getting myself confused. It helps to refresh your memory from time to time. There are two bits relevant to this discusson: Bit 6 of the SHADOW register determines whether the I/O and language card space are shadowed in banks 0 and 1. (They always appear in banks $E0 and $E1.) This is normally enabled at all times. Bit 4 of the SPEED register determines whether shadowing is enabled in all fast RAM banks (instead of just banks 0 and 1). This is the one I was thinking of, but I got it muddled up with the other one, and thought it was specifically referring to the I/O and language card space, not shadowing. In descriptions of this bit, it says it must always be set to zero to disable this feature, if you are using the standard operating system. The description of SPEED bit 4 says that the shadowed areas are determined by SHADOW bits 0 to 4. The effect of SHADOW bit 6 is apparently not replicated in other fast memory banks. If this is the case, then there is no way to enable enable I/O shadowing in all banks, so my previous post is almost completely meaningless, along with part of the parenthsesised comment at the end of my earlier post. :-) -- David Empson dempson@actrix.gen.nz Snail mail: P O Box 27-103, Wellington, New Zealand